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from Cryo-CMOS to AI





13:30 - 18:00



Room 5B


Advanced silicon technology nodes are more and more based on FinFETs, which have many advantages both in density and performance as well as under cryogenic temperatures. FinFET technology has recently also become more readily available also in Europe to academia and industry opening new research and design opportunities. However, at this point, Universities still work mostly with planar technologies and have only started to engage to use FinFET. The objective of this workshop is intended to close the gap between these two realities. By showing successful recent state-of-the-art examples of FinFET designs realized in silicon we hope to spark increased awareness of the benefits of the technology in the academic community.


Andreas Burg (EPFL, CH)

Andreas Burg received his Dipl.-Ing. degree from the Swiss Federal Institute of Technology (ETH) Zurich and the Dr. sc. techn. degree from the Integrated Systems Laboratory of ETH Zurich, in 2006. He is currently a Professor at the EPFL in Lausanne, Switzerland, where he is heading the Telecommunications Circuits Laboratory. His research focuses on both algorithms and implementation aspects of Telecom systems as well as on low-power high-density digital Integrated Circuits Design. In the area of circuits for communications, his group has developed both efficient algorithms for communications, ranging from MIMO detectors to algorithms for various types of channel coding. In the area of IC design, his main contributions are in the area of approximate computing and in the design of high-density memories. His group has developed for example the highest-density embedded memories in standard CMOS processes, a technology that is currently commercialized by RAAAM Memory Technologies.


Alexander Fish (Bar Ilan University, IL)

Prof.  Alexander Fish received the B.Sc. degree in Electrical Engineering from the Technion, Israel Institute of Technology, Haifa, Israel, in 1999. He completed his M.Sc. in 2002 and his Ph.D. (summa cum laude) in 2006, respectively, at Ben-Gurion University in Israel. He was a postdoctoral fellow in the ATIPS laboratory at the University of Calgary (Canada) from 2006-2008. In 2008 he joined the Ben-Gurion University in Israel, as a faculty member in the Electrical and Computer Engineering Department. There he founded the Low Power Circuits and Systems (LPC&S) laboratory, specializing in low power circuits and systems. In July 2011 he was appointed as a head of the VLSI Systems Center at BGU. In October 2012 Prof. Fish joined the Bar-Ilan University, Faculty of Engineering as an Associate Professor and the head of the nanoelectronics track. In March 2015 he founded Emerging nanoscaled Integrated Circuits and Systems (ENICS) labs. Currently, he is a Full Professor and a co-director of the EnICS Impact Center.

 Prof. Fish’s research interests include power reduction methodologies for high speed digital and mixed signal VLSI chips, energy efficient SRAM and eDRAM memory arrays, CMOS image sensors and biomedical circuis, systems and applications and cryogenic CMOS circuits. He has authored over 190 scientific papers in journals and conferences. He also submitted more than 30 patent applications of which 22 were granted. Prof. Fish has published three book chapters and two books as an editor.

 Prof. Fish founded and served as an Editor in Chief for the MDPI Journal of Low Power Electronics and Applications (JLPEA) from 2012 to 2018 and was an Associate Editor of IEEE various journals. Today he is an Associate Editor of IEEE Access Journal, Microelectronics Journal (Elsiever) and Integration, the VLSI journal (Elsiever). He also served as a program chair and chair of different tracks of various IEEE conferences. He was a co-organizer of many special sessions at IEEE conferences, including IEEE ISCAS, IEEE Sensors and IEEEI conferences. Prof. Fish is a member of the Technical Committee of the European Solid-State Circuits Conference.  He is also a member of the VLSI Systems and Applications and Bio-medical Systems Technical Committees of IEEE Circuits and Systems Society.



13:30 - 14:10

Introduction to FinFET Circuit Designs

Meng-Fan (Marvin) Chang (TSMC and National Tsing Hua University, TW)

14:10 - 14:50

FinFET CMOS technology for low-T and ML applications

Edoardo Charbon  (Advanced Quantum Architecture Lab AQUA - EPFL, CH)


14:50 - 15:30

High-Density Logic-Compatible Embedded Memories in the FinFET Era and Beyond

Robert Giterman (RAAAM Memory Technologies Ltd, IL)


15:30 - 16:00



16:00 - 16:40

Analog Design with Finfets – Tips and Hazzards

Yizhak Shifman (EnICS Research Center, Bar Ilan University and NVDIA, IL)

Joseph Shor (EnICS Research Center, Bar Ilan University, IL)


16:40 - 17:20

Reconfigurable computational imaging SPAD camera

Andrei Ardelean (Advanced Quantum Architecture Lab  AQUA - EPFL, NovoViz, CH)


17:20 - 18:00

Building AI accelerators in scaled technologies

Marian Verhelst (KU Leuven and imec, BE)

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